1 Index: libgomp/fortran.c
2 ===================================================================
3 --- libgomp/fortran.c (.../tags/gcc_4_5_3_release) (wersja 173771)
4 +++ libgomp/fortran.c (.../branches/gcc-4_5-branch) (wersja 173771)
6 -/* Copyright (C) 2005, 2007, 2008, 2009 Free Software Foundation, Inc.
7 +/* Copyright (C) 2005, 2007, 2008, 2009, 2011 Free Software Foundation, Inc.
8 Contributed by Jakub Jelinek <jakub@redhat.com>.
10 This file is part of the GNU OpenMP Library (libgomp).
13 #include "libgomp_f.h"
17 #ifdef HAVE_ATTRIBUTE_ALIAS
18 /* Use internal aliases if possible. */
20 omp_lock_symver (omp_test_nest_lock_)
23 +#define TO_INT(x) ((x) > INT_MIN ? (x) < INT_MAX ? (x) : INT_MAX : INT_MIN)
26 omp_set_dynamic_ (const int32_t *set)
30 omp_set_dynamic_8_ (const int64_t *set)
32 - omp_set_dynamic (*set);
33 + omp_set_dynamic (!!*set);
39 omp_set_nested_8_ (const int64_t *set)
41 - omp_set_nested (*set);
42 + omp_set_nested (!!*set);
48 omp_set_num_threads_8_ (const int64_t *set)
50 - omp_set_num_threads (*set);
51 + omp_set_num_threads (TO_INT (*set));
57 omp_set_schedule_8_ (const int32_t *kind, const int64_t *modifier)
59 - omp_set_schedule (*kind, *modifier);
60 + omp_set_schedule (*kind, TO_INT (*modifier));
66 omp_set_max_active_levels_8_ (const int64_t *levels)
68 - omp_set_max_active_levels (*levels);
69 + omp_set_max_active_levels (TO_INT (*levels));
75 omp_get_ancestor_thread_num_8_ (const int64_t *level)
77 - return omp_get_ancestor_thread_num (*level);
78 + return omp_get_ancestor_thread_num (TO_INT (*level));
84 omp_get_team_size_8_ (const int64_t *level)
86 - return omp_get_team_size (*level);
87 + return omp_get_team_size (TO_INT (*level));
91 Index: libgomp/ChangeLog
92 ===================================================================
93 --- libgomp/ChangeLog (.../tags/gcc_4_5_3_release) (wersja 173771)
94 +++ libgomp/ChangeLog (.../branches/gcc-4_5-branch) (wersja 173771)
96 +2011-05-06 Jakub Jelinek <jakub@redhat.com>
99 + * fortran.c: Include limits.h.
101 + (omp_set_dynamic_8_, omp_set_num_threads_8_): Use !!*set instead of
103 + (omp_set_num_threads_8_, omp_set_schedule_8_,
104 + omp_set_max_active_levels_8_, omp_get_ancestor_thread_num_8_,
105 + omp_get_team_size_8_): Use TO_INT macro.
106 + * testsuite/libgomp.fortran/pr48894.f90: New test.
108 2011-04-28 Release Manager
110 * GCC 4.5.3 released.
111 Index: libgomp/testsuite/libgomp.fortran/pr48894.f90
112 ===================================================================
113 --- libgomp/testsuite/libgomp.fortran/pr48894.f90 (.../tags/gcc_4_5_3_release) (wersja 0)
114 +++ libgomp/testsuite/libgomp.fortran/pr48894.f90 (.../branches/gcc-4_5-branch) (wersja 173771)
118 +! { dg-options "-fdefault-integer-8" }
121 + integer, parameter :: zero = 0
126 + !$omp parallel private (l)
127 + l = omp_get_ancestor_thread_num (-HUGE (zero)) .ne. -1
128 + l = l .or. (omp_get_ancestor_thread_num (HUGE (zero)) .ne. -1)
129 + l = l .or. (omp_get_team_size (-HUGE (zero)) .ne. -1)
130 + l = l .or. (omp_get_team_size (HUGE (zero)) .ne. -1)
137 + if (err .ne. 0) call abort
140 ===================================================================
141 --- gcc/fwprop.c (.../tags/gcc_4_5_3_release) (wersja 173771)
142 +++ gcc/fwprop.c (.../branches/gcc-4_5-branch) (wersja 173771)
145 process_uses (df_get_artificial_uses (bb_index), DF_REF_AT_TOP);
146 process_defs (df_get_artificial_defs (bb_index), DF_REF_AT_TOP);
147 - df_simulate_initialize_forwards (bb, local_lr);
149 + /* We don't call df_simulate_initialize_forwards, as it may overestimate
150 + the live registers if there are unused artificial defs. We prefer
151 + liveness to be underestimated. */
153 FOR_BB_INSNS (bb, insn)
157 ===================================================================
158 --- gcc/DATESTAMP (.../tags/gcc_4_5_3_release) (wersja 173771)
159 +++ gcc/DATESTAMP (.../branches/gcc-4_5-branch) (wersja 173771)
163 Index: gcc/tree-tailcall.c
164 ===================================================================
165 --- gcc/tree-tailcall.c (.../tags/gcc_4_5_3_release) (wersja 173771)
166 +++ gcc/tree-tailcall.c (.../branches/gcc-4_5-branch) (wersja 173771)
167 @@ -1007,6 +1007,14 @@
171 + if (a_acc || m_acc)
173 + /* When the tail call elimination using accumulators is performed,
174 + statements adding the accumulated value are inserted at all exits.
175 + This turns all other tail calls to non-tail ones. */
176 + opt_tailcalls = false;
179 for (; tailcalls; tailcalls = next)
181 next = tailcalls->next;
183 ===================================================================
184 --- gcc/final.c (.../tags/gcc_4_5_3_release) (wersja 173771)
185 +++ gcc/final.c (.../branches/gcc-4_5-branch) (wersja 173771)
186 @@ -2241,6 +2241,11 @@
188 expanded_location expanded;
190 + /* Make sure we flush any queued register saves in case this
191 + clobbers affected registers. */
192 + if (dwarf2out_do_frame ())
193 + dwarf2out_frame_debug (insn, false);
195 /* There's no telling what that did to the condition codes. */
198 Index: gcc/fold-const.c
199 ===================================================================
200 --- gcc/fold-const.c (.../tags/gcc_4_5_3_release) (wersja 173771)
201 +++ gcc/fold-const.c (.../branches/gcc-4_5-branch) (wersja 173771)
202 @@ -2784,8 +2784,6 @@
205 tem = fold_ignored_result (arg);
206 - if (TREE_CODE (tem) == MODIFY_EXPR)
207 - goto fold_convert_exit;
208 return fold_build1_loc (loc, NOP_EXPR, type, tem);
212 ===================================================================
213 --- gcc/DEV-PHASE (.../tags/gcc_4_5_3_release) (wersja 173771)
214 +++ gcc/DEV-PHASE (.../branches/gcc-4_5-branch) (wersja 173771)
218 ===================================================================
219 --- gcc/ChangeLog (.../tags/gcc_4_5_3_release) (wersja 173771)
220 +++ gcc/ChangeLog (.../branches/gcc-4_5-branch) (wersja 173771)
222 +2011-05-11 Michael Meissner <meissner@linux.vnet.ibm.com>
224 + Backport from mainline
225 + 2011-05-10 Michael Meissner <meissner@linux.vnet.ibm.com>
227 + PR target/48857, 48495
228 + * config/rs6000/rs6000.h (VSX_SCALAR_MODE): Delete.
230 + (VSX_MOVE_MODE): Ditto.
231 + (ALTIVEC_OR_VSX_VECTOR_MODE): New macro, combine all Altivec and
232 + VSX vector types. Add V2DImode.
233 + (HARD_REGNO_CALLER_SAVE_MODE): Use it instead of
234 + ALTIVEC_VECTOR_MODE and VSX_VECTOR_MODE calls.
235 + (MODES_TIEABLE_P): Ditto.
237 + * config/rs6000/rs6000.c (rs6000_emit_move): Use
238 + ALTIVEC_OR_VSX_MODE instead of ALTIVEC_VECTOR_MODE and
240 + (init_cumulative_args): Ditto.
241 + (rs6000_function_arg_boundary): Ditto.
242 + (rs6000_function_arg_advance_1): Ditto.
243 + (rs6000_function_arg): Ditto.
244 + (rs6000_function_ok_for_sibcall): Ditto.
245 + (emit_frame_save): Ditto.
246 + (rs6000_function_value): Ditto.
247 + (rs6000_libcall_value): Ditto.
249 +2011-05-10 Jakub Jelinek <jakub@redhat.com>
251 + Backported from mainline
252 + 2011-05-07 Zdenek Dvorak <ook@ucw.cz>
254 + PR tree-optimization/48837
255 + * tree-tailcall.c (tree_optimize_tail_calls_1): Do not mark tailcalls
256 + when accumulator transformation is performed.
258 +2011-05-09 Eric Botcazou <ebotcazou@adacore.com>
260 + * var-tracking.c (find_mem_expr_in_1pdv): Fix thinko.
261 + (dataflow_set_preserve_mem_locs): Likewise.
263 +2011-05-07 Alan Modra <amodra@gmail.com>
266 + * config/rs6000/rs6000.c (rs6000_legitimize_tls_address): Use
267 + const0_rtx as the arg to the dummy __tls_get_addr libcall.
269 +2011-05-05 Jason Merrill <jason@redhat.com>
272 + * tree-inline.c (copy_tree_r): Handle STATEMENT_LIST.
274 +2011-05-05 Julian Brown <julian@codesourcery.com>
276 + * config/arm/neon.md (vec_set<mode>_internal): Fix misplaced
277 + parenthesis in D-register case.
279 +2011-05-05 Ira Rosen <ira.rosen@linaro.org>
281 + Backport from mainline:
282 + 2011-04-18 Ulrich Weigand <ulrich.weigand@linaro.org>
283 + Ira Rosen <ira.rosen@linaro.org>
286 + * config/arm/arm.c (neon_emit_pair_result_insn): Swap arguments
287 + to match neon_vzip/vuzp/vtrn_internal.
288 + * config/arm/neon.md (neon_vtrn<mode>_internal): Make both
289 + outputs explicitly dependent on both inputs.
290 + (neon_vzip<mode>_internal, neon_vuzp<mode>_internal): Likewise.
292 +2011-05-04 Uros Bizjak <ubizjak@gmail.com>
294 + Backport from mainline
295 + 2011-04-21 Uros Bizjak <ubizjak@gmail.com>
298 + * config/i386/i386.c (ix86_expand_vector_set) <V2DImode>: Generate
299 + vec_extract and vec_concat for non-SSE4_1 targets.
301 +2011-05-04 Uros Bizjak <ubizjak@gmail.com>
303 + * config/i386/i386.md (*movdi_internal_rex64) <TYPE_SSEMOV>:
304 + Use %v prefix in insn mnemonic to handle TARGET_AVX.
305 + (*movdi_internal): Use "maybe_vex" instead of "vex" in "prefix"
306 + attribute calculation.
307 + (*movdf_internal): Output AVX mnemonics. Add "prefix" attribute.
308 + * config/i386/sse.md (*sse2_storeq_rex64): Do not emit %v prefix
309 + for mov{q} mnemonic.
310 + (*vec_extractv2di_1_rex64_avx): Ditto.
311 + (*vec_concatv2di_rex64_sse4_1): Use %vmovd for reg<->xmm moves.
312 + (*vec_concatv2di_rex64_sse): Use movd for reg<->xmm moves.
313 + * config/i386/mmx.md (*mov<mode>_internal_rex64): Ditto.
315 +2011-05-03 Uros Bizjak <ubizjak@gmail.com>
316 + Jakub Jelinek <jakub@redhat.com>
319 + * config/i386/i386.c (ix86_match_ccmode): For CC{A,C,O,S}mode
320 + only succeed if req_mode is the same as set_mode.
322 +2011-05-03 Jakub Jelinek <jakub@redhat.com>
324 + Backport from mainline
325 + 2011-04-30 Jakub Jelinek <jakub@redhat.com>
327 + PR tree-optimization/48809
328 + * tree-switch-conversion.c (build_arrays): Compute tidx in unsigned
330 + (gen_inbound_check): Don't compute index_expr - range_min in utype
331 + again, instead reuse SSA_NAME initialized in build_arrays.
332 + Remove two useless gsi_for_stmt calls.
334 + 2011-04-28 Jakub Jelinek <jakub@redhat.com>
336 + PR middle-end/48597
337 + * final.c (final_scan_insn): Call dwarf2out_frame_debug even for
340 + 2011-04-27 Jakub Jelinek <jakub@redhat.com>
343 + * c-typeck.c (build_binary_op): Don't wrap arguments if
344 + int_operands is true.
346 + 2011-04-23 Jakub Jelinek <jakub@redhat.com>
349 + * fold-const.c (fold_convert_loc): Add NOP_EXPR when casting
350 + to VOID_TYPE even around MODIFY_EXPR.
352 +2011-05-02 Ulrich Weigand <ulrich.weigand@linaro.org>
354 + PR middle-end/43085
355 + Backport from mainline:
357 + 2010-04-29 Bernd Schmidt <bernds@codesourcery.com>
359 + From Dominique d'Humieres <dominiq@lps.ens.fr>
361 + * ifcvt.c (dead_or_predicable): Use df_simulate_find_defs to compute
364 + 2010-04-26 Bernd Schmidt <bernds@codesourcery.com>
366 + * df-problems.c (df_simulate_initialize_forwards): Set, don't clear,
367 + bits for artificial defs at the top of the block.
368 + * fwprop.c (single_def_use_enter_block): Don't call it.
370 + 2010-04-22 Bernd Schmidt <bernds@codesourcery.com>
372 + * ifcvt.c (dead_or_predicable): Use df_simulate_find_defs and
373 + df_simulate_find_noclobber_defs as appropriate. Keep track of an
374 + extra set merge_set_noclobber, and use it to relax the final test
376 + * df.h (df_simulate_find_noclobber_defs): Declare.
377 + * df-problems.c (df_simulate_find_defs): Don't ignore partial or
379 + (df_simulate_find_noclobber_defs): New function.
381 +2011-04-29 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
384 + * config/pa/predicates.md (ior_operand): Delete predicate.
385 + (cint_ior_operand, reg_or_cint_ior_operand): New predicates.
386 + * config/pa/pa.md (iordi3): Use reg_or_cint_ior_operand predicate in
387 + expander. Use cint_ior_operand in unnamed insn.
388 + (iorsi3): Likewise.
389 + * config/pa/pa-protos.h (ior_operand): Delete declarations.
391 +2011-04-28 Richard Guenther <rguenther@suse.de>
393 + * DEV-PHASE: Set back to prerelease.
394 + * BASE-VER: Bump to 4.5.4.
396 2011-04-28 Release Manager
398 * GCC 4.5.3 released.
399 Index: gcc/testsuite/gcc.c-torture/execute/pr48809.c
400 ===================================================================
401 --- gcc/testsuite/gcc.c-torture/execute/pr48809.c (.../tags/gcc_4_5_3_release) (wersja 0)
402 +++ gcc/testsuite/gcc.c-torture/execute/pr48809.c (.../branches/gcc-4_5-branch) (wersja 173771)
404 +/* PR tree-optimization/48809 */
406 +extern void abort (void);
414 + case 0: y = 1; break;
415 + case 1: y = 7; break;
416 + case 2: y = 2; break;
417 + case 3: y = 19; break;
418 + case 4: y = 5; break;
419 + case 5: y = 17; break;
420 + case 6: y = 31; break;
421 + case 7: y = 8; break;
422 + case 8: y = 28; break;
423 + case 9: y = 16; break;
424 + case 10: y = 31; break;
425 + case 11: y = 12; break;
426 + case 12: y = 15; break;
427 + case 13: y = 111; break;
428 + case 14: y = 17; break;
429 + case 15: y = 10; break;
430 + case 16: y = 31; break;
431 + case 17: y = 7; break;
432 + case 18: y = 2; break;
433 + case 19: y = 19; break;
434 + case 20: y = 5; break;
435 + case 21: y = 107; break;
436 + case 22: y = 31; break;
437 + case 23: y = 8; break;
438 + case 24: y = 28; break;
439 + case 25: y = 106; break;
440 + case 26: y = 31; break;
441 + case 27: y = 102; break;
442 + case 28: y = 105; break;
443 + case 29: y = 111; break;
444 + case 30: y = 17; break;
445 + case 31: y = 10; break;
446 + case 32: y = 31; break;
447 + case 98: y = 18; break;
448 + case -62: y = 19; break;
456 + if (foo (98) != 18 || foo (97) != 0 || foo (99) != 0)
458 + if (foo (-62) != 19 || foo (-63) != 0 || foo (-61) != 0)
460 + if (foo (28) != 105 || foo (27) != 102 || foo (29) != 111)
464 Index: gcc/testsuite/gcc.c-torture/compile/pr48742.c
465 ===================================================================
466 --- gcc/testsuite/gcc.c-torture/compile/pr48742.c (.../tags/gcc_4_5_3_release) (wersja 0)
467 +++ gcc/testsuite/gcc.c-torture/compile/pr48742.c (.../branches/gcc-4_5-branch) (wersja 173771)
482 + baz (1 <= 2 % (3 >> 1 > 5 / 6 == 3));
484 Index: gcc/testsuite/gcc.target/arm/neon-vset_lanes8.c
485 ===================================================================
486 --- gcc/testsuite/gcc.target/arm/neon-vset_lanes8.c (.../tags/gcc_4_5_3_release) (wersja 0)
487 +++ gcc/testsuite/gcc.target/arm/neon-vset_lanes8.c (.../branches/gcc-4_5-branch) (wersja 173771)
489 +/* Test the `vset_lane_s8' ARM Neon intrinsic. */
492 +/* { dg-require-effective-target arm_neon_hw } */
493 +/* { dg-options "-O0" } */
494 +/* { dg-add-options arm_neon } */
496 +#include "arm_neon.h"
500 +int8x8_t x = { 1, 2, 3, 4, 5, 6, 7, 8 };
501 +int8x8_t y = { 1, 2, 3, 16, 5, 6, 7, 8 };
505 + x = vset_lane_s8 (16, x, 3);
506 + if (memcmp (&x, &y, sizeof (x)) != 0)
510 Index: gcc/testsuite/gcc.target/arm/pr48252.c
511 ===================================================================
512 --- gcc/testsuite/gcc.target/arm/pr48252.c (.../tags/gcc_4_5_3_release) (wersja 0)
513 +++ gcc/testsuite/gcc.target/arm/pr48252.c (.../branches/gcc-4_5-branch) (wersja 173771)
516 +/* { dg-require-effective-target arm_neon_hw } */
517 +/* { dg-options "-O2" } */
518 +/* { dg-add-options arm_neon } */
520 +#include "arm_neon.h"
525 + uint8x8_t v1 = {1, 1, 1, 1, 1, 1, 1, 1};
526 + uint8x8_t v2 = {2, 2, 2, 2, 2, 2, 2, 2};
527 + uint8x8x2_t vd1, vd2;
528 + union {uint8x8_t v; uint8_t buf[8];} d1, d2, d3, d4;
531 + vd1 = vzip_u8(v1, vdup_n_u8(0));
532 + vd2 = vzip_u8(v2, vdup_n_u8(0));
534 + vst1_u8(d1.buf, vd1.val[0]);
535 + vst1_u8(d2.buf, vd1.val[1]);
536 + vst1_u8(d3.buf, vd2.val[0]);
537 + vst1_u8(d4.buf, vd2.val[1]);
539 + for (i = 0; i < 8; i++)
540 + if ((i % 2 == 0 && d4.buf[i] != 2)
541 + || (i % 2 == 1 && d4.buf[i] != 0))
546 Index: gcc/testsuite/gcc.target/powerpc/pr48857.c
547 ===================================================================
548 --- gcc/testsuite/gcc.target/powerpc/pr48857.c (.../tags/gcc_4_5_3_release) (wersja 0)
549 +++ gcc/testsuite/gcc.target/powerpc/pr48857.c (.../branches/gcc-4_5-branch) (wersja 173771)
551 +/* { dg-do compile { target { powerpc*-*-* } } } */
552 +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
553 +/* { dg-require-effective-target powerpc_vsx_ok } */
554 +/* { dg-options "-O2 -mcpu=power7 -mabi=altivec" } */
555 +/* { dg-final { scan-assembler-times "lxvd2x" 1 } } */
556 +/* { dg-final { scan-assembler-times "stxvd2x" 1 } } */
557 +/* { dg-final { scan-assembler-not "ld" } } */
558 +/* { dg-final { scan-assembler-not "lwz" } } */
559 +/* { dg-final { scan-assembler-not "stw" } } */
560 +/* { dg-final { scan-assembler-not "addi" } } */
562 +typedef vector long long v2di_type;
565 +return_v2di (v2di_type *ptr)
567 + return *ptr; /* should generate lxvd2x 34,0,3. */
571 +pass_v2di (v2di_type arg, v2di_type *ptr)
573 + *ptr = arg; /* should generate stxvd2x 34,0,{3,5}. */
576 Index: gcc/testsuite/gcc.target/i386/pr48708.c
577 ===================================================================
578 --- gcc/testsuite/gcc.target/i386/pr48708.c (.../tags/gcc_4_5_3_release) (wersja 0)
579 +++ gcc/testsuite/gcc.target/i386/pr48708.c (.../branches/gcc-4_5-branch) (wersja 173771)
581 +/* { dg-do compile } */
582 +/* { dg-options "-O2 -msse2" } */
584 +#include <emmintrin.h>
586 +typedef long long T __attribute__((may_alias));
587 +struct S { __m128i d; };
590 +foo (long long *x, struct S *y, __m128i *z)
593 + ((T *) &s.d)[0] = *x;
594 + return _mm_cmpeq_epi16 (s.d, *z);
596 Index: gcc/testsuite/gcc.target/i386/sse2-init-v2di-2.c
597 ===================================================================
598 --- gcc/testsuite/gcc.target/i386/sse2-init-v2di-2.c (.../tags/gcc_4_5_3_release) (wersja 173771)
599 +++ gcc/testsuite/gcc.target/i386/sse2-init-v2di-2.c (.../branches/gcc-4_5-branch) (wersja 173771)
601 /* { dg-do compile } */
602 /* { dg-require-effective-target lp64 } */
603 -/* { dg-options "-O2 -msse4 -march=core2" } */
604 +/* { dg-options "-O2 -msse4 -march=core2 -dp" } */
606 #include <emmintrin.h>
609 return _mm_cvtsi64_si128 (b);
612 -/* { dg-final { scan-assembler "movq" } } */
613 +/* { dg-final { scan-assembler-times "\\*vec_concatv2di_rex64_sse4_1/3" 1 } } */
614 Index: gcc/testsuite/gcc.dg/pr48774.c
615 ===================================================================
616 --- gcc/testsuite/gcc.dg/pr48774.c (.../tags/gcc_4_5_3_release) (wersja 0)
617 +++ gcc/testsuite/gcc.dg/pr48774.c (.../branches/gcc-4_5-branch) (wersja 173771)
619 +/* PR target/48774 */
621 +/* { dg-options "-O2 -funroll-loops" } */
623 +extern void abort (void);
624 +unsigned long int s[24]
625 + = { 12, ~1, 12, ~2, 12, ~4, 12, ~8, 12, ~16, 12, ~32,
626 + 12, ~64, 12, ~128, 12, ~256, 12, ~512, 12, ~1024, 12, ~2048 };
627 +struct { int n; unsigned long *e[12]; } g
628 + = { 12, { &s[0], &s[2], &s[4], &s[6], &s[8], &s[10], &s[12], &s[14],
629 + &s[16], &s[18], &s[20], &s[22] } };
632 +__attribute__((noinline, noclone)) void
636 + for (i = 0; i < g.n; i++)
637 + for (j = 0; j < g.n; j++)
639 + if (i == j && j < g.e[0][0] && (g.e[i][1] & (1UL << j)))
641 + if (j < g.e[0][0] && (g.e[i][1] & (1UL << j)))
650 + asm volatile ("" : "+m" (s), "+m" (g), "+m" (c));
652 + for (i = 0; i < 12; i++)
657 Index: gcc/testsuite/gcc.dg/pr48837.c
658 ===================================================================
659 --- gcc/testsuite/gcc.dg/pr48837.c (.../tags/gcc_4_5_3_release) (wersja 0)
660 +++ gcc/testsuite/gcc.dg/pr48837.c (.../branches/gcc-4_5-branch) (wersja 173771)
662 +/* PR tree-optimization/48837 */
664 +/* { dg-options "-O2" } */
668 +__attribute__((noinline))
674 +inline const int *bar(const int *a, const int *b)
679 +int foo(int a, int b)
681 + return a || b ? baz() : foo(*bar(&a, &b), 1) + foo(1, 0);
686 + if (foo(0, 0) != 2)
692 Index: gcc/testsuite/gcc.dg/pr48685.c
693 ===================================================================
694 --- gcc/testsuite/gcc.dg/pr48685.c (.../tags/gcc_4_5_3_release) (wersja 0)
695 +++ gcc/testsuite/gcc.dg/pr48685.c (.../branches/gcc-4_5-branch) (wersja 173771)
698 +/* { dg-do compile } */
699 +/* { dg-options "-O2" } */
705 + (void) (1 == 2 ? (void) 0 : (v = 0));
708 Index: gcc/testsuite/ChangeLog
709 ===================================================================
710 --- gcc/testsuite/ChangeLog (.../tags/gcc_4_5_3_release) (wersja 173771)
711 +++ gcc/testsuite/ChangeLog (.../branches/gcc-4_5-branch) (wersja 173771)
713 +2011-05-11 Michael Meissner <meissner@linux.vnet.ibm.com>
715 + Backport from mainline
716 + 2011-05-10 Michael Meissner <meissner@linux.vnet.ibm.com>
719 + * gcc.target/powerpc/pr48857.c: New file, make sure V2DI arguments
720 + are passed and returned in vector registers.
722 +2011-05-10 Jakub Jelinek <jakub@redhat.com>
724 + Backported from mainline
725 + 2011-05-07 Zdenek Dvorak <ook@ucw.cz>
727 + PR tree-optimization/48837
728 + * gcc.dg/pr48837.c: New testcase.
730 +2011-05-09 Jason Merrill <jason@redhat.com>
732 + * g++.dg/template/nontype23.C: New.
734 +2011-05-05 Jason Merrill <jason@redhat.com>
736 + * g++.dg/init/new30.C: New.
738 +2011-05-05 Julian Brown <julian@codesourcery.com>
740 + * gcc.target/arm/neon-vset_lanes8.c: New test.
742 +2011-05-05 Ira Rosen <ira.rosen@linaro.org>
744 + Backport from mainline:
745 + 2011-04-18 Ulrich Weigand <ulrich.weigand@linaro.org>
746 + Ira Rosen <ira.rosen@linaro.org>
749 + * gcc.target/arm/pr48252.c: New test.
751 +2011-05-04 Uros Bizjak <ubizjak@gmail.com>
753 + Backport from mainline
754 + 2011-04-21 Uros Bizjak <ubizjak@gmail.com>
757 + * gcc.target/i386/pr48708.c: New test.
759 +2011-05-04 Uros Bizjak <ubizjak@gmail.com>
761 + Backport from mainline
762 + 2010-12-08 H.J. Lu <hongjiu.lu@intel.com>
764 + * gcc.target/i386/sse2-init-v2di-2.c: Add "-dp" and update
767 +2011-05-03 Jakub Jelinek <jakub@redhat.com>
770 + * gcc.dg/pr48774.c: New test.
772 + Backport from mainline
773 + 2011-04-30 Jakub Jelinek <jakub@redhat.com>
775 + PR tree-optimization/48809
776 + * gcc.c-torture/execute/pr48809.c: New test.
778 + 2011-04-27 Jakub Jelinek <jakub@redhat.com>
781 + * gcc.c-torture/compile/pr48742.c: New test.
783 + 2011-04-23 Jakub Jelinek <jakub@redhat.com>
786 + * gcc.dg/pr48685.c: New test.
788 +2011-04-27 Jason Merrill <jason@redhat.com>
790 + * g++.dg/parse/ambig6.C: New.
792 2011-04-28 Release Manager
794 * GCC 4.5.3 released.
795 Index: gcc/testsuite/g++.dg/parse/ambig6.C
796 ===================================================================
797 --- gcc/testsuite/g++.dg/parse/ambig6.C (.../tags/gcc_4_5_3_release) (wersja 0)
798 +++ gcc/testsuite/g++.dg/parse/ambig6.C (.../branches/gcc-4_5-branch) (wersja 173771)
802 +namespace N1 { typedef int T; } // { dg-error "" }
803 +namespace N2 { typedef float T; } // { dg-error "" }
807 + using namespace N1;
808 + using namespace N2;
810 + static T t; // { dg-error "" }
812 Index: gcc/testsuite/g++.dg/init/new30.C
813 ===================================================================
814 --- gcc/testsuite/g++.dg/init/new30.C (.../tags/gcc_4_5_3_release) (wersja 0)
815 +++ gcc/testsuite/g++.dg/init/new30.C (.../branches/gcc-4_5-branch) (wersja 173771)
821 + // constructor required to reproduce compiler bug
827 + // array new as default argument required to reproduce compiler bug
828 + ptr_type (data_type* ptr = new data_type[1]) { delete[] ptr; }
832 Index: gcc/testsuite/g++.dg/template/nontype23.C
833 ===================================================================
834 --- gcc/testsuite/g++.dg/template/nontype23.C (.../tags/gcc_4_5_3_release) (wersja 0)
835 +++ gcc/testsuite/g++.dg/template/nontype23.C (.../branches/gcc-4_5-branch) (wersja 173771)
839 +template <bool C> int foo (void);
840 +template <class T> struct S
842 + static const unsigned int a = sizeof (T);
843 + enum { c = sizeof (foo <(a == 0)> ()) };
846 Index: gcc/cp/ChangeLog
847 ===================================================================
848 --- gcc/cp/ChangeLog (.../tags/gcc_4_5_3_release) (wersja 173771)
849 +++ gcc/cp/ChangeLog (.../branches/gcc-4_5-branch) (wersja 173771)
851 +2011-05-09 Jason Merrill <jason@redhat.com>
854 + * decl2.c (mark_used): Instantiate constant variables even
855 + in unevaluated context.
857 +2011-04-27 Jason Merrill <jason@redhat.com>
860 + * parser.c (cp_parser_diagnose_invalid_type_name): Commit
861 + to tentative parse sooner.
863 2011-04-28 Release Manager
865 * GCC 4.5.3 released.
866 Index: gcc/cp/decl2.c
867 ===================================================================
868 --- gcc/cp/decl2.c (.../tags/gcc_4_5_3_release) (wersja 173771)
869 +++ gcc/cp/decl2.c (.../branches/gcc-4_5-branch) (wersja 173771)
870 @@ -3991,8 +3991,6 @@
872 mark_used (tree decl)
874 - HOST_WIDE_INT saved_processing_template_decl = 0;
876 /* If DECL is a BASELINK for a single function, then treat it just
877 like the DECL for the function. Otherwise, if the BASELINK is
878 for an overloaded function, we don't know which function was
879 @@ -4029,9 +4027,6 @@
883 - /* If we don't need a value, then we don't need to synthesize DECL. */
884 - if (cp_unevaluated_operand != 0)
887 /* We can only check DECL_ODR_USED on variables or functions with
888 DECL_LANG_SPECIFIC set, and these are also the only decls that we
889 @@ -4059,9 +4054,10 @@
890 DECL. However, if DECL is a static data member initialized with
891 a constant, we need the value right now because a reference to
892 such a data member is not value-dependent. */
893 - if (TREE_CODE (decl) == VAR_DECL
894 - && DECL_INITIALIZED_BY_CONSTANT_EXPRESSION_P (decl)
895 - && DECL_CLASS_SCOPE_P (decl))
896 + if (DECL_INTEGRAL_CONSTANT_VAR_P (decl)
897 + && !DECL_INITIAL (decl)
898 + && DECL_LANG_SPECIFIC (decl)
899 + && DECL_TEMPLATE_INSTANTIATION (decl))
901 /* Don't try to instantiate members of dependent types. We
902 cannot just use dependent_type_p here because this function
903 @@ -4071,12 +4067,14 @@
904 if (CLASSTYPE_TEMPLATE_INFO ((DECL_CONTEXT (decl)))
905 && uses_template_parms (CLASSTYPE_TI_ARGS (DECL_CONTEXT (decl))))
907 - /* Pretend that we are not in a template, even if we are, so
908 - that the static data member initializer will be processed. */
909 - saved_processing_template_decl = processing_template_decl;
910 - processing_template_decl = 0;
911 + instantiate_decl (decl, /*defer_ok=*/false,
912 + /*expl_inst_class_mem_p=*/false);
915 + /* If we don't need a value, then we don't need to synthesize DECL. */
916 + if (cp_unevaluated_operand != 0)
919 if (processing_template_decl)
922 @@ -4149,8 +4147,6 @@
923 need. Therefore, we always try to defer instantiation. */
924 instantiate_decl (decl, /*defer_ok=*/true,
925 /*expl_inst_class_mem_p=*/false);
927 - processing_template_decl = saved_processing_template_decl;
930 #include "gt-cp-decl2.h"
931 Index: gcc/cp/parser.c
932 ===================================================================
933 --- gcc/cp/parser.c (.../tags/gcc_4_5_3_release) (wersja 173771)
934 +++ gcc/cp/parser.c (.../branches/gcc-4_5-branch) (wersja 173771)
935 @@ -2333,6 +2333,7 @@
938 tree decl, old_scope;
939 + cp_parser_commit_to_tentative_parse (parser);
940 /* Try to lookup the identifier. */
941 old_scope = parser->scope;
942 parser->scope = scope;
943 @@ -2423,7 +2424,6 @@
947 - cp_parser_commit_to_tentative_parse (parser);
950 /* Check for a common situation where a type-name should be present,
952 ===================================================================
953 --- gcc/ifcvt.c (.../tags/gcc_4_5_3_release) (wersja 173771)
954 +++ gcc/ifcvt.c (.../branches/gcc-4_5-branch) (wersja 173771)
955 @@ -3818,7 +3818,7 @@
956 basic_block other_bb, basic_block new_dest, int reversep)
958 rtx head, end, jump, earliest = NULL_RTX, old_dest, new_label = NULL_RTX;
959 - bitmap merge_set = NULL;
960 + bitmap merge_set = NULL, merge_set_noclobber = NULL;
961 /* Number of pending changes. */
962 int n_validated_changes = 0;
964 @@ -3951,11 +3951,14 @@
967 MERGE_SET = set of registers set in MERGE_BB
968 + MERGE_SET_NOCLOBBER = like MERGE_SET, but only includes registers
969 + that are really set, not just clobbered.
970 TEST_LIVE = set of registers live at EARLIEST
971 - TEST_SET = set of registers set between EARLIEST and the
972 - end of the block. */
973 + TEST_SET = set of registers set between EARLIEST and the
974 + end of the block. */
976 merge_set = BITMAP_ALLOC (®_obstack);
977 + merge_set_noclobber = BITMAP_ALLOC (®_obstack);
979 /* If we allocated new pseudos (e.g. in the conditional move
980 expander called from noce_emit_cmove), we must resize the
981 @@ -3967,13 +3970,8 @@
983 if (NONDEBUG_INSN_P (insn))
985 - unsigned int uid = INSN_UID (insn);
987 - for (def_rec = DF_INSN_UID_DEFS (uid); *def_rec; def_rec++)
989 - df_ref def = *def_rec;
990 - bitmap_set_bit (merge_set, DF_REF_REGNO (def));
992 + df_simulate_find_defs (insn, merge_set);
993 + df_simulate_find_noclobber_defs (insn, merge_set_noclobber);
997 @@ -3984,7 +3982,7 @@
1001 - EXECUTE_IF_SET_IN_BITMAP (merge_set, 0, i, bi)
1002 + EXECUTE_IF_SET_IN_BITMAP (merge_set_noclobber, 0, i, bi)
1004 if (i < FIRST_PSEUDO_REGISTER
1006 @@ -4015,12 +4013,14 @@
1009 /* We can perform the transformation if
1010 - MERGE_SET & (TEST_SET | TEST_LIVE)
1011 + MERGE_SET_NOCLOBBER & TEST_SET
1013 + MERGE_SET & TEST_LIVE
1015 TEST_SET & DF_LIVE_IN (merge_bb)
1018 - if (bitmap_intersect_p (merge_set, test_set)
1019 + if (bitmap_intersect_p (merge_set_noclobber, test_set)
1020 || bitmap_intersect_p (merge_set, test_live)
1021 || bitmap_intersect_p (test_set, df_get_live_in (merge_bb)))
1023 @@ -4104,10 +4104,11 @@
1027 - EXECUTE_IF_SET_IN_BITMAP (merge_set, 0, i, bi)
1028 + EXECUTE_IF_SET_IN_BITMAP (merge_set_noclobber, 0, i, bi)
1029 remove_reg_equal_equiv_notes_for_regno (i);
1031 BITMAP_FREE (merge_set);
1032 + BITMAP_FREE (merge_set_noclobber);
1035 reorder_insns (head, end, PREV_INSN (earliest));
1036 @@ -4128,7 +4129,10 @@
1040 - BITMAP_FREE (merge_set);
1042 + BITMAP_FREE (merge_set);
1043 + BITMAP_FREE (merge_set_noclobber);
1049 ===================================================================
1050 --- gcc/BASE-VER (.../tags/gcc_4_5_3_release) (wersja 173771)
1051 +++ gcc/BASE-VER (.../branches/gcc-4_5-branch) (wersja 173771)
1056 ===================================================================
1057 --- gcc/df.h (.../tags/gcc_4_5_3_release) (wersja 173771)
1058 +++ gcc/df.h (.../branches/gcc-4_5-branch) (wersja 173771)
1060 extern void df_md_add_problem (void);
1061 extern void df_md_simulate_artificial_defs_at_top (basic_block, bitmap);
1062 extern void df_md_simulate_one_insn (basic_block, rtx, bitmap);
1063 +extern void df_simulate_find_noclobber_defs (rtx, bitmap);
1064 extern void df_simulate_find_defs (rtx, bitmap);
1065 extern void df_simulate_defs (rtx, bitmap);
1066 extern void df_simulate_uses (rtx, bitmap);
1067 Index: gcc/c-typeck.c
1068 ===================================================================
1069 --- gcc/c-typeck.c (.../tags/gcc_4_5_3_release) (wersja 173771)
1070 +++ gcc/c-typeck.c (.../branches/gcc-4_5-branch) (wersja 173771)
1071 @@ -9800,7 +9800,7 @@
1072 warn_for_sign_compare (location, orig_op0_folded,
1073 orig_op1_folded, op0, op1,
1074 result_type, resultcode);
1075 - if (!in_late_binary_op)
1076 + if (!in_late_binary_op && !int_operands)
1078 if (!op0_maybe_const || TREE_CODE (op0) != INTEGER_CST)
1079 op0 = c_wrap_maybe_const (op0, !op0_maybe_const);
1080 Index: gcc/tree-inline.c
1081 ===================================================================
1082 --- gcc/tree-inline.c (.../tags/gcc_4_5_3_release) (wersja 173771)
1083 +++ gcc/tree-inline.c (.../branches/gcc-4_5-branch) (wersja 173771)
1084 @@ -4179,14 +4179,16 @@
1085 CONSTRUCTOR_ELTS (*tp));
1088 + else if (code == STATEMENT_LIST)
1089 + /* We used to just abort on STATEMENT_LIST, but we can run into them
1090 + with statement-expressions (c++/40975). */
1091 + copy_statement_list (tp);
1092 else if (TREE_CODE_CLASS (code) == tcc_type)
1094 else if (TREE_CODE_CLASS (code) == tcc_declaration)
1096 else if (TREE_CODE_CLASS (code) == tcc_constant)
1099 - gcc_assert (code != STATEMENT_LIST);
1103 Index: gcc/var-tracking.c
1104 ===================================================================
1105 --- gcc/var-tracking.c (.../tags/gcc_4_5_3_release) (wersja 173771)
1106 +++ gcc/var-tracking.c (.../branches/gcc-4_5-branch) (wersja 173771)
1107 @@ -4134,8 +4134,9 @@
1108 VALUE_RECURSED_INTO (val) = true;
1110 for (node = var->var_part[0].loc_chain; node; node = node->next)
1111 - if (MEM_P (node->loc) && MEM_EXPR (node->loc) == expr
1112 - && MEM_OFFSET (node->loc) == 0)
1113 + if (MEM_P (node->loc)
1114 + && MEM_EXPR (node->loc) == expr
1115 + && INT_MEM_OFFSET (node->loc) == 0)
1119 @@ -4198,11 +4199,10 @@
1121 for (loc = var->var_part[0].loc_chain; loc; loc = loc->next)
1123 - /* We want to remove dying MEMs that doesn't refer to
1125 + /* We want to remove dying MEMs that doesn't refer to DECL. */
1126 if (GET_CODE (loc->loc) == MEM
1127 && (MEM_EXPR (loc->loc) != decl
1128 - || MEM_OFFSET (loc->loc))
1129 + || INT_MEM_OFFSET (loc->loc) != 0)
1130 && !mem_dies_at_call (loc->loc))
1132 /* We want to move here MEMs that do refer to DECL. */
1133 @@ -4246,7 +4246,7 @@
1135 if (GET_CODE (loc->loc) != MEM
1136 || (MEM_EXPR (loc->loc) == decl
1137 - && MEM_OFFSET (loc->loc) == 0)
1138 + && INT_MEM_OFFSET (loc->loc) == 0)
1139 || !mem_dies_at_call (loc->loc))
1141 if (old_loc != loc->loc && emit_notes)
1142 Index: gcc/df-problems.c
1143 ===================================================================
1144 --- gcc/df-problems.c (.../tags/gcc_4_5_3_release) (wersja 173771)
1145 +++ gcc/df-problems.c (.../branches/gcc-4_5-branch) (wersja 173771)
1146 @@ -3748,9 +3748,22 @@
1147 for (def_rec = DF_INSN_UID_DEFS (uid); *def_rec; def_rec++)
1149 df_ref def = *def_rec;
1150 - /* If the def is to only part of the reg, it does
1151 - not kill the other defs that reach here. */
1152 - if (!(DF_REF_FLAGS (def) & (DF_REF_PARTIAL | DF_REF_CONDITIONAL)))
1153 + bitmap_set_bit (defs, DF_REF_REGNO (def));
1157 +/* Find the set of real DEFs, which are not clobbers, for INSN. */
1160 +df_simulate_find_noclobber_defs (rtx insn, bitmap defs)
1163 + unsigned int uid = INSN_UID (insn);
1165 + for (def_rec = DF_INSN_UID_DEFS (uid); *def_rec; def_rec++)
1167 + df_ref def = *def_rec;
1168 + if (!(DF_REF_FLAGS (def) & (DF_REF_MUST_CLOBBER | DF_REF_MAY_CLOBBER)))
1169 bitmap_set_bit (defs, DF_REF_REGNO (def));
1172 @@ -3903,13 +3916,9 @@
1173 the block, starting with the first one.
1174 ----------------------------------------------------------------------------*/
1176 -/* Apply the artificial uses and defs at the top of BB in a forwards
1177 - direction. ??? This is wrong; defs mark the point where a pseudo
1178 - becomes live when scanning forwards (unless a def is unused). Since
1179 - there are no REG_UNUSED notes for artificial defs, passes that
1180 - require artificial defs probably should not call this function
1181 - unless (as is the case for fwprop) they are correct when liveness
1182 - bitmaps are *under*estimated. */
1183 +/* Initialize the LIVE bitmap, which should be copied from DF_LIVE_IN or
1184 + DF_LR_IN for basic block BB, for forward scanning by marking artificial
1188 df_simulate_initialize_forwards (basic_block bb, bitmap live)
1189 @@ -3921,7 +3930,7 @@
1191 df_ref def = *def_rec;
1192 if (DF_REF_FLAGS (def) & DF_REF_AT_TOP)
1193 - bitmap_clear_bit (live, DF_REF_REGNO (def));
1194 + bitmap_set_bit (live, DF_REF_REGNO (def));
1198 @@ -3942,7 +3951,7 @@
1199 while here the scan is performed forwards! So, first assume that the
1200 def is live, and if this is not true REG_UNUSED notes will rectify the
1202 - df_simulate_find_defs (insn, live);
1203 + df_simulate_find_noclobber_defs (insn, live);
1205 /* Clear all of the registers that go dead. */
1206 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1207 Index: gcc/tree-switch-conversion.c
1208 ===================================================================
1209 --- gcc/tree-switch-conversion.c (.../tags/gcc_4_5_3_release) (wersja 173771)
1210 +++ gcc/tree-switch-conversion.c (.../branches/gcc-4_5-branch) (wersja 173771)
1212 build_arrays (gimple swtch)
1214 tree arr_index_type;
1215 - tree tidx, sub, tmp;
1216 + tree tidx, sub, tmp, utype;
1218 gimple_stmt_iterator gsi;
1220 @@ -557,14 +557,20 @@
1222 gsi = gsi_for_stmt (swtch);
1224 + /* Make sure we do not generate arithmetics in a subrange. */
1225 + utype = TREE_TYPE (info.index_expr);
1226 + if (TREE_TYPE (utype))
1227 + utype = lang_hooks.types.type_for_mode (TYPE_MODE (TREE_TYPE (utype)), 1);
1229 + utype = lang_hooks.types.type_for_mode (TYPE_MODE (utype), 1);
1231 arr_index_type = build_index_type (info.range_size);
1232 - tmp = create_tmp_var (TREE_TYPE (info.index_expr), "csti");
1233 + tmp = create_tmp_var (utype, "csui");
1234 add_referenced_var (tmp);
1235 tidx = make_ssa_name (tmp, NULL);
1236 - sub = fold_build2_loc (loc, MINUS_EXPR,
1237 - TREE_TYPE (info.index_expr), info.index_expr,
1238 - fold_convert_loc (loc, TREE_TYPE (info.index_expr),
1240 + sub = fold_build2_loc (loc, MINUS_EXPR, utype,
1241 + fold_convert_loc (loc, utype, info.index_expr),
1242 + fold_convert_loc (loc, utype, info.range_min));
1243 sub = force_gimple_operand_gsi (&gsi, sub,
1244 false, NULL, true, GSI_SAME_STMT);
1245 stmt = gimple_build_assign (tidx, sub);
1246 @@ -673,12 +679,7 @@
1247 tree label_decl2 = create_artificial_label (UNKNOWN_LOCATION);
1248 tree label_decl3 = create_artificial_label (UNKNOWN_LOCATION);
1249 gimple label1, label2, label3;
1252 - tree tmp_u_1, tmp_u_2, tmp_u_var;
1254 - gimple cast_assign, minus_assign;
1260 @@ -692,49 +693,24 @@
1261 gcc_assert (info.default_values);
1262 bb0 = gimple_bb (swtch);
1264 - /* Make sure we do not generate arithmetics in a subrange. */
1265 - if (TREE_TYPE (TREE_TYPE (info.index_expr)))
1266 - utype = lang_hooks.types.type_for_mode
1267 - (TYPE_MODE (TREE_TYPE (TREE_TYPE (info.index_expr))), 1);
1269 - utype = lang_hooks.types.type_for_mode
1270 - (TYPE_MODE (TREE_TYPE (info.index_expr)), 1);
1271 + tidx = gimple_assign_lhs (info.arr_ref_first);
1272 + utype = TREE_TYPE (tidx);
1274 /* (end of) block 0 */
1275 gsi = gsi_for_stmt (info.arr_ref_first);
1276 - tmp_u_var = create_tmp_var (utype, "csui");
1277 - add_referenced_var (tmp_u_var);
1278 - tmp_u_1 = make_ssa_name (tmp_u_var, NULL);
1281 - cast = fold_convert_loc (loc, utype, info.index_expr);
1282 - cast_assign = gimple_build_assign (tmp_u_1, cast);
1283 - SSA_NAME_DEF_STMT (tmp_u_1) = cast_assign;
1284 - gsi_insert_before (&gsi, cast_assign, GSI_SAME_STMT);
1285 - update_stmt (cast_assign);
1287 - ulb = fold_convert_loc (loc, utype, info.range_min);
1288 - minus = fold_build2_loc (loc, MINUS_EXPR, utype, tmp_u_1, ulb);
1289 - minus = force_gimple_operand_gsi (&gsi, minus, false, NULL, true,
1291 - tmp_u_2 = make_ssa_name (tmp_u_var, NULL);
1292 - minus_assign = gimple_build_assign (tmp_u_2, minus);
1293 - SSA_NAME_DEF_STMT (tmp_u_2) = minus_assign;
1294 - gsi_insert_before (&gsi, minus_assign, GSI_SAME_STMT);
1295 - update_stmt (minus_assign);
1297 bound = fold_convert_loc (loc, utype, info.range_size);
1298 - cond_stmt = gimple_build_cond (LE_EXPR, tmp_u_2, bound, NULL_TREE, NULL_TREE);
1299 + cond_stmt = gimple_build_cond (LE_EXPR, tidx, bound, NULL_TREE, NULL_TREE);
1300 gsi_insert_before (&gsi, cond_stmt, GSI_SAME_STMT);
1301 update_stmt (cond_stmt);
1304 - gsi = gsi_for_stmt (info.arr_ref_first);
1305 label2 = gimple_build_label (label_decl2);
1306 gsi_insert_before (&gsi, label2, GSI_SAME_STMT);
1307 last_assign = gen_def_assigns (&gsi);
1310 - gsi = gsi_for_stmt (info.arr_ref_first);
1311 label1 = gimple_build_label (label_decl1);
1312 gsi_insert_before (&gsi, label1, GSI_SAME_STMT);
1314 Index: gcc/config/i386/i386.md
1315 ===================================================================
1316 --- gcc/config/i386/i386.md (.../tags/gcc_4_5_3_release) (wersja 173771)
1317 +++ gcc/config/i386/i386.md (.../branches/gcc-4_5-branch) (wersja 173771)
1318 @@ -2430,7 +2430,7 @@
1319 [(set_attr "type" "*,*,mmx,mmxmov,mmxmov,sselog1,ssemov,ssemov,ssemov,sselog1,ssemov,ssemov,ssemov")
1320 (set (attr "prefix")
1321 (if_then_else (eq_attr "alternative" "5,6,7,8")
1322 - (const_string "vex")
1323 + (const_string "maybe_vex")
1324 (const_string "orig")))
1325 (set_attr "mode" "DI,DI,DI,DI,DI,TI,DI,TI,DI,V4SF,V2SF,V4SF,V2SF")])
1327 @@ -2468,21 +2468,15 @@
1328 return "movdq2q\t{%1, %0|%0, %1}";
1333 - if (get_attr_mode (insn) == MODE_TI)
1334 - return "vmovdqa\t{%1, %0|%0, %1}";
1336 - return "vmovq\t{%1, %0|%0, %1}";
1339 if (get_attr_mode (insn) == MODE_TI)
1340 - return "movdqa\t{%1, %0|%0, %1}";
1342 + return "%vmovdqa\t{%1, %0|%0, %1}";
1343 + /* Handle broken assemblers that require movd instead of movq. */
1344 + if (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1]))
1345 + return "%vmovd\t{%1, %0|%0, %1}";
1346 + return "%vmovq\t{%1, %0|%0, %1}";
1349 - /* Moves from and into integer register is done using movd
1350 - opcode with REX prefix. */
1351 + /* Handle broken assemblers that require movd instead of movq. */
1352 if (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1]))
1353 return "movd\t{%1, %0|%0, %1}";
1354 return "movq\t{%1, %0|%0, %1}";
1355 @@ -2915,12 +2909,13 @@
1357 case 9: case 10: case 14: case 15:
1358 return "movd\t{%1, %0|%0, %1}";
1360 - return "%vmovd\t{%1, %0|%0, %1}";
1363 return "movq\t{%1, %0|%0, %1}";
1366 + return "%vmovd\t{%1, %0|%0, %1}";
1371 @@ -3067,6 +3062,7 @@
1377 switch (get_attr_mode (insn))
1379 @@ -3262,7 +3258,8 @@
1383 - return "%vmovd\t{%1, %0|%0, %1}";
1384 + /* Handle broken assemblers that require movd instead of movq. */
1385 + return "%vmovd\t{%1, %0|%0, %1}";
1389 @@ -3361,11 +3358,11 @@
1390 switch (get_attr_mode (insn))
1393 - return "xorps\t%0, %0";
1394 + return "%vxorps\t%0, %d0";
1396 - return "xorpd\t%0, %0";
1397 + return "%vxorpd\t%0, %d0";
1399 - return "pxor\t%0, %0";
1400 + return "%vpxor\t%0, %d0";
1404 @@ -3375,28 +3372,56 @@
1405 switch (get_attr_mode (insn))
1408 - return "movaps\t{%1, %0|%0, %1}";
1409 + return "%vmovaps\t{%1, %0|%0, %1}";
1411 - return "movapd\t{%1, %0|%0, %1}";
1412 + return "%vmovapd\t{%1, %0|%0, %1}";
1414 - return "movdqa\t{%1, %0|%0, %1}";
1415 + return "%vmovdqa\t{%1, %0|%0, %1}";
1417 - return "movq\t{%1, %0|%0, %1}";
1418 + return "%vmovq\t{%1, %0|%0, %1}";
1420 - return "movsd\t{%1, %0|%0, %1}";
1423 + if (REG_P (operands[0]) && REG_P (operands[1]))
1424 + return "vmovsd\t{%1, %0, %0|%0, %0, %1}";
1426 + return "vmovsd\t{%1, %0|%0, %1}";
1429 + return "movsd\t{%1, %0|%0, %1}";
1431 - return "movlpd\t{%1, %0|%0, %1}";
1434 + if (REG_P (operands[0]))
1435 + return "vmovlpd\t{%1, %0, %0|%0, %0, %1}";
1437 + return "vmovlpd\t{%1, %0|%0, %1}";
1440 + return "movlpd\t{%1, %0|%0, %1}";
1442 - return "movlps\t{%1, %0|%0, %1}";
1445 + if (REG_P (operands[0]))
1446 + return "vmovlps\t{%1, %0, %0|%0, %0, %1}";
1448 + return "vmovlps\t{%1, %0|%0, %1}";
1451 + return "movlps\t{%1, %0|%0, %1}";
1457 - gcc_unreachable();
1458 + gcc_unreachable ();
1461 [(set_attr "type" "fmov,fmov,fmov,multi,multi,sselog1,ssemov,ssemov,ssemov")
1462 + (set (attr "prefix")
1463 + (if_then_else (eq_attr "alternative" "0,1,2,3,4")
1464 + (const_string "orig")
1465 + (const_string "maybe_vex")))
1466 (set (attr "prefix_data16")
1467 (if_then_else (eq_attr "mode" "V1DF")
1469 Index: gcc/config/i386/mmx.md
1470 ===================================================================
1471 --- gcc/config/i386/mmx.md (.../tags/gcc_4_5_3_release) (wersja 173771)
1472 +++ gcc/config/i386/mmx.md (.../branches/gcc-4_5-branch) (wersja 173771)
1477 +;; movd instead of movq is required to handle broken assemblers.
1478 (define_insn "*mov<mode>_internal_rex64"
1479 [(set (match_operand:MMXMODEI8 0 "nonimmediate_operand"
1480 "=rm,r,!?y,!?y ,m ,!y,*Y2,x,x ,m,r,Yi")
1483 %vmovq\t{%1, %0|%0, %1}
1484 %vmovq\t{%1, %0|%0, %1}
1485 - %vmovq\t{%1, %0|%0, %1}
1486 - %vmovq\t{%1, %0|%0, %1}"
1487 + %vmovd\t{%1, %0|%0, %1}
1488 + %vmovd\t{%1, %0|%0, %1}"
1489 [(set_attr "type" "imov,imov,mmx,mmxmov,mmxmov,ssecvt,ssecvt,sselog1,ssemov,ssemov,ssemov,ssemov")
1490 (set_attr "unit" "*,*,*,*,*,mmx,mmx,*,*,*,*,*")
1491 (set_attr "prefix_rep" "*,*,*,*,*,1,1,*,1,*,*,*")
1493 (const_string "orig")))
1494 (set_attr "mode" "DI,DI,DI,DI,DI,DI,DI,V4SF,V4SF,V2SF,V2SF,DI,DI")])
1496 +;; movd instead of movq is required to handle broken assemblers.
1497 (define_insn "*movv2sf_internal_rex64"
1498 [(set (match_operand:V2SF 0 "nonimmediate_operand"
1499 "=rm,r ,!?y,!?y ,m ,!y,*Y2,x,x,x,m,r,Yi")
1500 Index: gcc/config/i386/sse.md
1501 ===================================================================
1502 --- gcc/config/i386/sse.md (.../tags/gcc_4_5_3_release) (wersja 173771)
1503 +++ gcc/config/i386/sse.md (.../branches/gcc-4_5-branch) (wersja 173771)
1504 @@ -7473,9 +7473,8 @@
1508 - %vmov{q}\t{%1, %0|%0, %1}"
1509 + mov{q}\t{%1, %0|%0, %1}"
1510 [(set_attr "type" "*,*,imov")
1511 - (set_attr "prefix" "*,*,maybe_vex")
1512 (set_attr "mode" "*,*,DI")])
1514 (define_insn "*sse2_storeq"
1515 @@ -7513,11 +7512,11 @@
1516 vmovhps\t{%1, %0|%0, %1}
1517 vpsrldq\t{$8, %1, %0|%0, %1, 8}
1518 vmovq\t{%H1, %0|%0, %H1}
1519 - vmov{q}\t{%H1, %0|%0, %H1}"
1520 + mov{q}\t{%H1, %0|%0, %H1}"
1521 [(set_attr "type" "ssemov,sseishft1,ssemov,imov")
1522 (set_attr "length_immediate" "*,1,*,*")
1523 (set_attr "memory" "*,none,*,*")
1524 - (set_attr "prefix" "vex")
1525 + (set_attr "prefix" "vex,vex,vex,orig")
1526 (set_attr "mode" "V2SF,TI,TI,DI")])
1528 (define_insn "*vec_extractv2di_1_rex64"
1529 @@ -7795,6 +7794,7 @@
1530 (const_string "vex")))
1531 (set_attr "mode" "TI,TI,TI,TI,TI,V2SF")])
1533 +;; movd instead of movq is required to handle broken assemblers.
1534 (define_insn "*vec_concatv2di_rex64_sse4_1"
1535 [(set (match_operand:V2DI 0 "register_operand" "=x ,x ,Yi,!x,x,x,x")
1537 @@ -7804,7 +7804,7 @@
1539 pinsrq\t{$0x1, %2, %0|%0, %2, 0x1}
1540 movq\t{%1, %0|%0, %1}
1541 - movq\t{%1, %0|%0, %1}
1542 + movd\t{%1, %0|%0, %1}
1543 movq2dq\t{%1, %0|%0, %1}
1544 punpcklqdq\t{%2, %0|%0, %2}
1545 movlhps\t{%2, %0|%0, %2}
1546 @@ -7815,6 +7815,7 @@
1547 (set_attr "length_immediate" "1,*,*,*,*,*,*")
1548 (set_attr "mode" "TI,TI,TI,TI,TI,V4SF,V2SF")])
1550 +;; movd instead of movq is required to handle broken assemblers.
1551 (define_insn "*vec_concatv2di_rex64_sse"
1552 [(set (match_operand:V2DI 0 "register_operand" "=Y2 ,Yi,!Y2,Y2,x,x")
1554 @@ -7823,7 +7824,7 @@
1555 "TARGET_64BIT && TARGET_SSE"
1557 movq\t{%1, %0|%0, %1}
1558 - movq\t{%1, %0|%0, %1}
1559 + movd\t{%1, %0|%0, %1}
1560 movq2dq\t{%1, %0|%0, %1}
1561 punpcklqdq\t{%2, %0|%0, %2}
1562 movlhps\t{%2, %0|%0, %2}
1563 Index: gcc/config/i386/i386.c
1564 ===================================================================
1565 --- gcc/config/i386/i386.c (.../tags/gcc_4_5_3_release) (wersja 173771)
1566 +++ gcc/config/i386/i386.c (.../branches/gcc-4_5-branch) (wersja 173771)
1567 @@ -14610,11 +14610,15 @@
1568 if (req_mode == CCZmode)
1579 + if (set_mode != req_mode)
1584 @@ -27711,10 +27715,19 @@
1588 - use_vec_merge = TARGET_SSE4_1;
1589 + use_vec_merge = TARGET_SSE4_1 && TARGET_64BIT;
1593 + tmp = gen_reg_rtx (GET_MODE_INNER (mode));
1594 + ix86_expand_vector_extract (false, tmp, target, 1 - elt);
1596 + tmp = gen_rtx_VEC_CONCAT (mode, tmp, val);
1598 + tmp = gen_rtx_VEC_CONCAT (mode, val, tmp);
1599 + emit_insn (gen_rtx_SET (VOIDmode, target, tmp));
1605 Index: gcc/config/rs6000/rs6000.c
1606 ===================================================================
1607 --- gcc/config/rs6000/rs6000.c (.../tags/gcc_4_5_3_release) (wersja 173771)
1608 +++ gcc/config/rs6000/rs6000.c (.../branches/gcc-4_5-branch) (wersja 173771)
1609 @@ -5426,10 +5426,11 @@
1611 if (model == TLS_MODEL_GLOBAL_DYNAMIC)
1613 - r3 = gen_rtx_REG (Pmode, 3);
1614 tga = rs6000_tls_get_addr ();
1615 - emit_library_call_value (tga, dest, LCT_CONST, Pmode, 1, r3, Pmode);
1616 + emit_library_call_value (tga, dest, LCT_CONST, Pmode,
1617 + 1, const0_rtx, Pmode);
1619 + r3 = gen_rtx_REG (Pmode, 3);
1620 if (DEFAULT_ABI == ABI_AIX && TARGET_64BIT)
1621 insn = gen_tls_gd_aix64 (r3, got, addr, tga, const0_rtx);
1622 else if (DEFAULT_ABI == ABI_AIX && !TARGET_64BIT)
1623 @@ -5446,11 +5447,12 @@
1625 else if (model == TLS_MODEL_LOCAL_DYNAMIC)
1627 - r3 = gen_rtx_REG (Pmode, 3);
1628 tga = rs6000_tls_get_addr ();
1629 tmp1 = gen_reg_rtx (Pmode);
1630 - emit_library_call_value (tga, tmp1, LCT_CONST, Pmode, 1, r3, Pmode);
1631 + emit_library_call_value (tga, tmp1, LCT_CONST, Pmode,
1632 + 1, const0_rtx, Pmode);
1634 + r3 = gen_rtx_REG (Pmode, 3);
1635 if (DEFAULT_ABI == ABI_AIX && TARGET_64BIT)
1636 insn = gen_tls_ld_aix64 (r3, got, tga, const0_rtx);
1637 else if (DEFAULT_ABI == ABI_AIX && !TARGET_64BIT)
1638 @@ -6694,7 +6696,7 @@
1640 /* Nonzero if we can use an AltiVec register to pass this arg. */
1641 #define USE_ALTIVEC_FOR_ARG_P(CUM,MODE,TYPE,NAMED) \
1642 - ((ALTIVEC_VECTOR_MODE (MODE) || VSX_VECTOR_MODE (MODE)) \
1643 + (ALTIVEC_OR_VSX_VECTOR_MODE (MODE) \
1644 && (CUM)->vregno <= ALTIVEC_ARG_MAX_REG \
1645 && TARGET_ALTIVEC_ABI \
1647 @@ -6920,7 +6922,7 @@
1648 existing library interfaces.
1650 Doubleword align SPE vectors.
1651 - Quadword align Altivec vectors.
1652 + Quadword align Altivec/VSX vectors.
1653 Quadword align large synthetic vector types. */
1656 @@ -6937,7 +6939,7 @@
1657 && int_size_in_bytes (type) >= 8
1658 && int_size_in_bytes (type) < 16))
1660 - else if ((ALTIVEC_VECTOR_MODE (mode) || VSX_VECTOR_MODE (mode))
1661 + else if (ALTIVEC_OR_VSX_VECTOR_MODE (mode)
1662 || (type && TREE_CODE (type) == VECTOR_TYPE
1663 && int_size_in_bytes (type) >= 16))
1665 @@ -7082,8 +7084,7 @@
1666 cum->nargs_prototype--;
1668 if (TARGET_ALTIVEC_ABI
1669 - && (ALTIVEC_VECTOR_MODE (mode)
1670 - || VSX_VECTOR_MODE (mode)
1671 + && (ALTIVEC_OR_VSX_VECTOR_MODE (mode)
1672 || (type && TREE_CODE (type) == VECTOR_TYPE
1673 && int_size_in_bytes (type) == 16)))
1675 @@ -7677,8 +7678,7 @@
1677 return gen_rtx_REG (mode, cum->vregno);
1678 else if (TARGET_ALTIVEC_ABI
1679 - && (ALTIVEC_VECTOR_MODE (mode)
1680 - || VSX_VECTOR_MODE (mode)
1681 + && (ALTIVEC_OR_VSX_VECTOR_MODE (mode)
1682 || (type && TREE_CODE (type) == VECTOR_TYPE
1683 && int_size_in_bytes (type) == 16)))
1685 @@ -18280,7 +18280,7 @@
1687 /* Some cases that need register indexed addressing. */
1688 if ((TARGET_ALTIVEC_ABI && ALTIVEC_VECTOR_MODE (mode))
1689 - || (TARGET_VSX && VSX_VECTOR_MODE (mode))
1690 + || (TARGET_VSX && ALTIVEC_OR_VSX_VECTOR_MODE (mode))
1691 || (TARGET_E500_DOUBLE && mode == DFmode)
1693 && SPE_VECTOR_MODE (mode)
1694 @@ -25565,14 +25565,13 @@
1695 else if (TREE_CODE (valtype) == COMPLEX_TYPE
1696 && targetm.calls.split_complex_arg)
1697 return rs6000_complex_function_value (mode);
1698 + /* VSX is a superset of Altivec and adds V2DImode/V2DFmode. Since the same
1699 + return register is used in both cases, and we won't see V2DImode/V2DFmode
1700 + for pure altivec, combine the two cases. */
1701 else if (TREE_CODE (valtype) == VECTOR_TYPE
1702 && TARGET_ALTIVEC && TARGET_ALTIVEC_ABI
1703 - && ALTIVEC_VECTOR_MODE (mode))
1704 + && ALTIVEC_OR_VSX_VECTOR_MODE (mode))
1705 regno = ALTIVEC_ARG_RETURN;
1706 - else if (TREE_CODE (valtype) == VECTOR_TYPE
1707 - && TARGET_VSX && TARGET_ALTIVEC_ABI
1708 - && VSX_VECTOR_MODE (mode))
1709 - regno = ALTIVEC_ARG_RETURN;
1710 else if (TARGET_E500_DOUBLE && TARGET_HARD_FLOAT
1711 && (mode == DFmode || mode == DCmode
1712 || mode == TFmode || mode == TCmode))
1713 @@ -25611,12 +25610,12 @@
1714 && TARGET_HARD_FLOAT && TARGET_FPRS
1715 && ((TARGET_SINGLE_FLOAT && mode == SFmode) || TARGET_DOUBLE_FLOAT))
1716 regno = FP_ARG_RETURN;
1717 - else if (ALTIVEC_VECTOR_MODE (mode)
1718 + /* VSX is a superset of Altivec and adds V2DImode/V2DFmode. Since the same
1719 + return register is used in both cases, and we won't see V2DImode/V2DFmode
1720 + for pure altivec, combine the two cases. */
1721 + else if (ALTIVEC_OR_VSX_VECTOR_MODE (mode)
1722 && TARGET_ALTIVEC && TARGET_ALTIVEC_ABI)
1723 regno = ALTIVEC_ARG_RETURN;
1724 - else if (VSX_VECTOR_MODE (mode)
1725 - && TARGET_VSX && TARGET_ALTIVEC_ABI)
1726 - regno = ALTIVEC_ARG_RETURN;
1727 else if (COMPLEX_MODE_P (mode) && targetm.calls.split_complex_arg)
1728 return rs6000_complex_function_value (mode);
1729 else if (TARGET_E500_DOUBLE && TARGET_HARD_FLOAT
1731 Zmiany atrybutów dla: gcc/config/rs6000/rs6000.c
1732 ___________________________________________________________________
1733 Dodane: svn:mergeinfo
1734 Połączono zmiany /trunk/gcc/config/rs6000/rs6000.c:r162404,173624
1736 Index: gcc/config/rs6000/rs6000.h
1737 ===================================================================
1738 --- gcc/config/rs6000/rs6000.h (.../tags/gcc_4_5_3_release) (wersja 173771)
1739 +++ gcc/config/rs6000/rs6000.h (.../branches/gcc-4_5-branch) (wersja 173771)
1740 @@ -1038,10 +1038,9 @@
1742 /* When setting up caller-save slots (MODE == VOIDmode) ensure we allocate
1743 enough space to account for vectors in FP regs. */
1744 -#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
1746 - && ((MODE) == VOIDmode || VSX_VECTOR_MODE (MODE) \
1747 - || ALTIVEC_VECTOR_MODE (MODE)) \
1748 +#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
1750 + && ((MODE) == VOIDmode || ALTIVEC_OR_VSX_VECTOR_MODE (MODE)) \
1751 && FP_REGNO_P (REGNO) \
1753 : choose_hard_reg_mode ((REGNO), (NREGS), false))
1754 @@ -1057,25 +1056,16 @@
1755 ((MODE) == V4SFmode \
1756 || (MODE) == V2DFmode) \
1758 -#define VSX_SCALAR_MODE(MODE) \
1759 - ((MODE) == DFmode)
1761 -#define VSX_MODE(MODE) \
1762 - (VSX_VECTOR_MODE (MODE) \
1763 - || VSX_SCALAR_MODE (MODE))
1765 -#define VSX_MOVE_MODE(MODE) \
1766 - (VSX_VECTOR_MODE (MODE) \
1767 - || VSX_SCALAR_MODE (MODE) \
1768 - || ALTIVEC_VECTOR_MODE (MODE) \
1769 - || (MODE) == TImode)
1771 #define ALTIVEC_VECTOR_MODE(MODE) \
1772 ((MODE) == V16QImode \
1773 || (MODE) == V8HImode \
1774 || (MODE) == V4SFmode \
1775 || (MODE) == V4SImode)
1777 +#define ALTIVEC_OR_VSX_VECTOR_MODE(MODE) \
1778 + (ALTIVEC_VECTOR_MODE (MODE) || VSX_VECTOR_MODE (MODE) \
1779 + || (MODE) == V2DImode)
1781 #define SPE_VECTOR_MODE(MODE) \
1782 ((MODE) == V4HImode \
1783 || (MODE) == V2SFmode \
1784 @@ -1118,10 +1108,10 @@
1785 ? ALTIVEC_VECTOR_MODE (MODE2) \
1786 : ALTIVEC_VECTOR_MODE (MODE2) \
1787 ? ALTIVEC_VECTOR_MODE (MODE1) \
1788 - : VSX_VECTOR_MODE (MODE1) \
1789 - ? VSX_VECTOR_MODE (MODE2) \
1790 - : VSX_VECTOR_MODE (MODE2) \
1791 - ? VSX_VECTOR_MODE (MODE1) \
1792 + : ALTIVEC_OR_VSX_VECTOR_MODE (MODE1) \
1793 + ? ALTIVEC_OR_VSX_VECTOR_MODE (MODE2) \
1794 + : ALTIVEC_OR_VSX_VECTOR_MODE (MODE2) \
1795 + ? ALTIVEC_OR_VSX_VECTOR_MODE (MODE1) \
1798 /* Post-reload, we can't use any new AltiVec registers, as we already
1800 Zmiany atrybutów dla: gcc/config/rs6000/rs6000.h
1801 ___________________________________________________________________
1802 Dodane: svn:mergeinfo
1803 Połączono zmiany /trunk/gcc/config/rs6000/rs6000.h:r162404,173624
1805 Index: gcc/config/arm/arm.c
1806 ===================================================================
1807 --- gcc/config/arm/arm.c (.../tags/gcc_4_5_3_release) (wersja 173771)
1808 +++ gcc/config/arm/arm.c (.../branches/gcc-4_5-branch) (wersja 173771)
1809 @@ -18237,7 +18237,7 @@
1810 rtx tmp1 = gen_reg_rtx (mode);
1811 rtx tmp2 = gen_reg_rtx (mode);
1813 - emit_insn (intfn (tmp1, op1, tmp2, op2));
1814 + emit_insn (intfn (tmp1, op1, op2, tmp2));
1816 emit_move_insn (mem, tmp1);
1817 mem = adjust_address (mem, mode, GET_MODE_SIZE (mode));
1818 Index: gcc/config/arm/neon.md
1819 ===================================================================
1820 --- gcc/config/arm/neon.md (.../tags/gcc_4_5_3_release) (wersja 173771)
1821 +++ gcc/config/arm/neon.md (.../branches/gcc-4_5-branch) (wersja 173771)
1823 (match_operand:SI 2 "immediate_operand" "i")))]
1826 - int elt = ffs ((int) INTVAL (operands[2]) - 1);
1827 + int elt = ffs ((int) INTVAL (operands[2])) - 1;
1828 if (BYTES_BIG_ENDIAN)
1829 elt = GET_MODE_NUNITS (<MODE>mode) - 1 - elt;
1830 operands[2] = GEN_INT (elt);
1831 @@ -3895,13 +3895,14 @@
1833 (define_insn "neon_vtrn<mode>_internal"
1834 [(set (match_operand:VDQW 0 "s_register_operand" "=w")
1835 - (unspec:VDQW [(match_operand:VDQW 1 "s_register_operand" "0")]
1837 - (set (match_operand:VDQW 2 "s_register_operand" "=w")
1838 - (unspec:VDQW [(match_operand:VDQW 3 "s_register_operand" "2")]
1840 + (unspec:VDQW [(match_operand:VDQW 1 "s_register_operand" "0")
1841 + (match_operand:VDQW 2 "s_register_operand" "w")]
1843 + (set (match_operand:VDQW 3 "s_register_operand" "=2")
1844 + (unspec:VDQW [(match_dup 1) (match_dup 2)]
1847 - "vtrn.<V_sz_elem>\t%<V_reg>0, %<V_reg>2"
1848 + "vtrn.<V_sz_elem>\t%<V_reg>0, %<V_reg>3"
1849 [(set (attr "neon_type")
1850 (if_then_else (ne (symbol_ref "<Is_d_reg>") (const_int 0))
1851 (const_string "neon_bp_simple")
1852 @@ -3921,13 +3922,14 @@
1854 (define_insn "neon_vzip<mode>_internal"
1855 [(set (match_operand:VDQW 0 "s_register_operand" "=w")
1856 - (unspec:VDQW [(match_operand:VDQW 1 "s_register_operand" "0")]
1858 - (set (match_operand:VDQW 2 "s_register_operand" "=w")
1859 - (unspec:VDQW [(match_operand:VDQW 3 "s_register_operand" "2")]
1861 + (unspec:VDQW [(match_operand:VDQW 1 "s_register_operand" "0")
1862 + (match_operand:VDQW 2 "s_register_operand" "w")]
1864 + (set (match_operand:VDQW 3 "s_register_operand" "=2")
1865 + (unspec:VDQW [(match_dup 1) (match_dup 2)]
1868 - "vzip.<V_sz_elem>\t%<V_reg>0, %<V_reg>2"
1869 + "vzip.<V_sz_elem>\t%<V_reg>0, %<V_reg>3"
1870 [(set (attr "neon_type")
1871 (if_then_else (ne (symbol_ref "<Is_d_reg>") (const_int 0))
1872 (const_string "neon_bp_simple")
1873 @@ -3947,13 +3949,14 @@
1875 (define_insn "neon_vuzp<mode>_internal"
1876 [(set (match_operand:VDQW 0 "s_register_operand" "=w")
1877 - (unspec:VDQW [(match_operand:VDQW 1 "s_register_operand" "0")]
1878 + (unspec:VDQW [(match_operand:VDQW 1 "s_register_operand" "0")
1879 + (match_operand:VDQW 2 "s_register_operand" "w")]
1881 - (set (match_operand:VDQW 2 "s_register_operand" "=w")
1882 - (unspec:VDQW [(match_operand:VDQW 3 "s_register_operand" "2")]
1884 + (set (match_operand:VDQW 3 "s_register_operand" "=2")
1885 + (unspec:VDQW [(match_dup 1) (match_dup 2)]
1888 - "vuzp.<V_sz_elem>\t%<V_reg>0, %<V_reg>2"
1889 + "vuzp.<V_sz_elem>\t%<V_reg>0, %<V_reg>3"
1890 [(set (attr "neon_type")
1891 (if_then_else (ne (symbol_ref "<Is_d_reg>") (const_int 0))
1892 (const_string "neon_bp_simple")
1893 Index: gcc/config/pa/predicates.md
1894 ===================================================================
1895 --- gcc/config/pa/predicates.md (.../tags/gcc_4_5_3_release) (wersja 173771)
1896 +++ gcc/config/pa/predicates.md (.../branches/gcc-4_5-branch) (wersja 173771)
1897 @@ -411,12 +411,16 @@
1899 ;; True iff depi can be used to compute (reg | OP).
1901 -(define_predicate "ior_operand"
1902 - (match_code "const_int")
1904 - return (GET_CODE (op) == CONST_INT && ior_mask_p (INTVAL (op)));
1906 +(define_predicate "cint_ior_operand"
1907 + (and (match_code "const_int")
1908 + (match_test "ior_mask_p (INTVAL (op))")))
1910 +;; True iff OP can be used to compute (reg | OP).
1912 +(define_predicate "reg_or_cint_ior_operand"
1913 + (ior (match_operand 0 "register_operand")
1914 + (match_operand 0 "cint_ior_operand")))
1916 ;; True iff OP is a CONST_INT of the forms 0...0xxxx or
1917 ;; 0...01...1xxxx. Such values can be the left hand side x in (x <<
1918 ;; r), using the zvdepi instruction.
1919 Index: gcc/config/pa/pa.md
1920 ===================================================================
1921 --- gcc/config/pa/pa.md (.../tags/gcc_4_5_3_release) (wersja 173771)
1922 +++ gcc/config/pa/pa.md (.../branches/gcc-4_5-branch) (wersja 173771)
1923 @@ -5686,7 +5686,7 @@
1924 (define_expand "iordi3"
1925 [(set (match_operand:DI 0 "register_operand" "")
1926 (ior:DI (match_operand:DI 1 "register_operand" "")
1927 - (match_operand:DI 2 "ior_operand" "")))]
1928 + (match_operand:DI 2 "reg_or_cint_ior_operand" "")))]
1932 @@ -5707,7 +5707,7 @@
1934 [(set (match_operand:DI 0 "register_operand" "=r,r")
1935 (ior:DI (match_operand:DI 1 "register_operand" "0,0")
1936 - (match_operand:DI 2 "ior_operand" "M,i")))]
1937 + (match_operand:DI 2 "cint_ior_operand" "M,i")))]
1939 "* return output_64bit_ior (operands); "
1940 [(set_attr "type" "binary,shift")
1941 @@ -5726,19 +5726,14 @@
1942 (define_expand "iorsi3"
1943 [(set (match_operand:SI 0 "register_operand" "")
1944 (ior:SI (match_operand:SI 1 "register_operand" "")
1945 - (match_operand:SI 2 "arith32_operand" "")))]
1946 + (match_operand:SI 2 "reg_or_cint_ior_operand" "")))]
1950 - if (! (ior_operand (operands[2], SImode)
1951 - || register_operand (operands[2], SImode)))
1952 - operands[2] = force_reg (SImode, operands[2]);
1957 [(set (match_operand:SI 0 "register_operand" "=r,r")
1958 (ior:SI (match_operand:SI 1 "register_operand" "0,0")
1959 - (match_operand:SI 2 "ior_operand" "M,i")))]
1960 + (match_operand:SI 2 "cint_ior_operand" "M,i")))]
1962 "* return output_ior (operands); "
1963 [(set_attr "type" "binary,shift")
1964 Index: gcc/config/pa/pa-protos.h
1965 ===================================================================
1966 --- gcc/config/pa/pa-protos.h (.../tags/gcc_4_5_3_release) (wersja 173771)
1967 +++ gcc/config/pa/pa-protos.h (.../branches/gcc-4_5-branch) (wersja 173771)
1969 extern int prefetch_cc_operand (rtx, enum machine_mode);
1970 extern int prefetch_nocc_operand (rtx, enum machine_mode);
1971 extern int and_operand (rtx, enum machine_mode);
1972 -extern int ior_operand (rtx, enum machine_mode);
1973 extern int arith32_operand (rtx, enum machine_mode);
1974 extern int uint32_operand (rtx, enum machine_mode);
1975 extern int reg_before_reload_operand (rtx, enum machine_mode);
1977 extern int fmpyaddoperands (rtx *);
1978 extern int fmpysuboperands (rtx *);
1979 extern int call_operand_address (rtx, enum machine_mode);
1980 -extern int ior_operand (rtx, enum machine_mode);
1981 extern void emit_bcond_fp (rtx[]);
1982 extern int emit_move_sequence (rtx *, enum machine_mode, rtx);
1983 extern int emit_hpdiv_const (rtx *, int);
1984 Index: libffi/src/alpha/osf.S
1985 ===================================================================
1986 --- libffi/src/alpha/osf.S (.../tags/gcc_4_5_3_release) (wersja 173771)
1987 +++ libffi/src/alpha/osf.S (.../branches/gcc-4_5-branch) (wersja 173771)
1989 /* -----------------------------------------------------------------------
1990 - osf.S - Copyright (c) 1998, 2001, 2007, 2008 Red Hat
1991 + osf.S - Copyright (c) 1998, 2001, 2007, 2008, 2011 Red Hat
1993 Alpha/OSF Foreign Function Interface
1995 @@ -299,33 +299,51 @@
1999 +# define UA_SI .4byte
2000 +# define FDE_ENCODING 0x1b /* pcrel sdata4 */
2001 +# define FDE_ENCODE(X) .4byte X-.
2002 +# define FDE_ARANGE(X) .4byte X
2003 +#elif defined __osf__
2004 +# define UA_SI .align 0; .long
2005 +# define FDE_ENCODING 0x50 /* aligned absolute */
2006 +# define FDE_ENCODE(X) .align 3; .quad X
2007 +# define FDE_ARANGE(X) .align 0; .quad X
2011 .section .eh_frame,EH_FRAME_FLAGS,@progbits
2012 +#elif defined __osf__
2015 + .globl _GLOBAL__F_ffi_call_osf
2016 +_GLOBAL__F_ffi_call_osf:
2019 - .4byte $LECIE1-$LSCIE1 # Length of Common Information Entry
2020 + UA_SI $LECIE1-$LSCIE1 # Length of Common Information Entry
2022 - .4byte 0x0 # CIE Identifier Tag
2023 + UA_SI 0x0 # CIE Identifier Tag
2024 .byte 0x1 # CIE Version
2025 .ascii "zR\0" # CIE Augmentation
2026 .byte 0x1 # uleb128 0x1; CIE Code Alignment Factor
2027 .byte 0x78 # sleb128 -8; CIE Data Alignment Factor
2028 .byte 26 # CIE RA Column
2029 .byte 0x1 # uleb128 0x1; Augmentation size
2030 - .byte 0x1b # FDE Encoding (pcrel sdata4)
2031 + .byte FDE_ENCODING # FDE Encoding
2032 .byte 0xc # DW_CFA_def_cfa
2033 .byte 30 # uleb128 column 30
2034 .byte 0 # uleb128 offset 0
2038 - .4byte $LEFDE1-$LASFDE1 # FDE Length
2039 + UA_SI $LEFDE1-$LASFDE1 # FDE Length
2041 - .4byte $LASFDE1-__FRAME_BEGIN__ # FDE CIE offset
2042 - .4byte $LFB1-. # FDE initial location
2043 - .4byte $LFE1-$LFB1 # FDE address range
2044 + UA_SI $LASFDE1-__FRAME_BEGIN__ # FDE CIE offset
2045 + FDE_ENCODE($LFB1) # FDE initial location
2046 + FDE_ARANGE($LFE1-$LFB1) # FDE address range
2047 .byte 0x0 # uleb128 0x0; Augmentation size
2049 .byte 0x4 # DW_CFA_advance_loc4
2050 - .4byte $LCFI1-$LFB1
2051 + UA_SI $LCFI1-$LFB1
2052 .byte 0x9a # DW_CFA_offset, column 26
2053 .byte 4 # uleb128 4*-8
2054 .byte 0x8f # DW_CFA_offset, column 15
2055 @@ -335,32 +353,35 @@
2056 .byte 32 # uleb128 offset 32
2058 .byte 0x4 # DW_CFA_advance_loc4
2059 - .4byte $LCFI2-$LCFI1
2060 + UA_SI $LCFI2-$LCFI1
2061 .byte 0xda # DW_CFA_restore, column 26
2066 - .4byte $LEFDE3-$LASFDE3 # FDE Length
2067 + UA_SI $LEFDE3-$LASFDE3 # FDE Length
2069 - .4byte $LASFDE3-__FRAME_BEGIN__ # FDE CIE offset
2070 - .4byte $LFB2-. # FDE initial location
2071 - .4byte $LFE2-$LFB2 # FDE address range
2072 + UA_SI $LASFDE3-__FRAME_BEGIN__ # FDE CIE offset
2073 + FDE_ENCODE($LFB2) # FDE initial location
2074 + FDE_ARANGE($LFE2-$LFB2) # FDE address range
2075 .byte 0x0 # uleb128 0x0; Augmentation size
2077 .byte 0x4 # DW_CFA_advance_loc4
2078 - .4byte $LCFI5-$LFB2
2079 + UA_SI $LCFI5-$LFB2
2080 .byte 0xe # DW_CFA_def_cfa_offset
2081 .byte 0x80,0x1 # uleb128 128
2083 .byte 0x4 # DW_CFA_advance_loc4
2084 - .4byte $LCFI6-$LCFI5
2085 + UA_SI $LCFI6-$LCFI5
2086 .byte 0x9a # DW_CFA_offset, column 26
2087 .byte 16 # uleb128 offset 16*-8
2090 +#if defined __osf__
2092 + .long 0 # End of Table
2096 +#if defined __ELF__ && defined __linux__
2097 .section .note.GNU-stack,"",@progbits
2100 Index: libffi/ChangeLog
2101 ===================================================================
2102 --- libffi/ChangeLog (.../tags/gcc_4_5_3_release) (wersja 173771)
2103 +++ libffi/ChangeLog (.../branches/gcc-4_5-branch) (wersja 173771)
2105 +2011-05-02 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
2107 + Backport from mainline:
2108 + 2011-04-29 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
2110 + * src/alpha/osf.S (UA_SI, FDE_ENCODING, FDE_ENCODE, FDE_ARANGE):
2112 + Use them to handle ELF vs. ECOFF differences.
2113 + [__osf__] (_GLOBAL__F_ffi_call_osf): Define.
2115 2011-04-28 Release Manager
2117 * GCC 4.5.3 released.